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| MLN7000
is a cost-effective single chip
solution for 8-port Ethernet to
HDLC (High-level Data Link Control)
bridge. The chip for connecting
Ethernet to HDLC is usually installed
in various IP-based xDSL network
such as ADSL, SDSL, VDSL and G.HDSL.
MLN7000 has eight Ethernet MACs
that can be operated at 100Mbps
in full duplex. Each of the Ethernet
MAC engines has the RMII (Reduced
Media Independent Interface) and
the DMA interface. Also, the chip
has eight HDLC transceivers that
operate in full duplex. Hence,
this chip is the Ethernet-to-HDLC
frame processor that can transform
Ethernet frame to HDLC frame and
conversely. It can simultaneously
receive 8 HDLC frames and 8 Ethernet
frames. At the same time, it can
transmit 8 HDLC frames and 8 Ethernet
frames. MLN7000 has an internal
high-speed data bus (M-bus) to
perform this parallel processing.
This chip uses the external SDRAM
for FIFO and frame memory and
supports the HDLC bit-synchronous
interface mode. The Ethernet Interface
of the chip supports IEEE 802.3x
flow control in full duplex. The
MLN7000 also supports the various
packet filtering and traffic shaper.
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·
Single Chip for Ethernet-to-HDLC
and HDLC-to-Ethernet frame conversion
· 8-port architecture
· IEEE 802.3 compliant Ethernet
· Reduced Media Independent Interface(RMII)
· Bit synchronous HDLC interface
· Two external 16bit wide SDRAMs
for packet buffering
· Packet filtering function (NetBios,
DHCP packet filtering)
· Traffic shaping circuit to adjust
data flow rate |
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·
Reduced function set of Ethernet
MAC
· CRC generation/Suppression function
in Ethernet MAC
· Long/Short packet mode for specialized
environments
· Supports bit-stuffing and de-stuffing
· Flag, idle sequence handling
· DMA engine with burst mode
· Serial interface with CPU
· 32way bus arbitration for FIFO
· Low-power 3.3V power supply
· 240-pin QFP package |
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