MCSLogic's MLN7400 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for embedded internet.

The MLN7400 is built around an outstanding CPU core: the 16/32-bit ARM7TDMI RISC processor designed by Advanced RISC Machines, Ltd. The ARM7TDMI core is a low-power, general purpose microprocessor macro-cell that was developed for use in application-specific and custom-specific integrated circuits. Its simple, elegant, and fully static design is particularly suitable for cost-sensitive and power-sensitive applications.

The MLN7400 offers a 4-Kbytes unified cache and Ethernet controller which reduces total system cost.

System Manager
- 8/16-bit external bus support for ROM/SRAM, flash memory, SDRAM, and external I/O
- Programmable access cycle
- External wait

Unified Instruction/Data Cache
- Two-way set-associative, unified 4-Kbytes cache
- Support for LRU protocol

Ethernet Controller
- DMA engine with burst mode
- DMA Tx/Rx buffers(256 bytes Tx, 256 bytes Rx)
- MAC Tx/Rx FIFO buffers(80 bytes Tx, 16 bytes Rx)
- Data alignment logic
- Endian translation
- 100/10-Mbit per second operation
- Full compliance with IEEE standard 802.3
- MII and 7-wire 10-Mbps interface
- Station Management signaling
- On-chip CAM ( up to 21 MAC addresses)
- Full-duplex mode with PAUSE feature
- Fully compliant with 802.3
- Long/short packet modes
- PAD generation

DMA Controller
- 2-channel General DMA for memory-to-memory, memory-to-UART, UART-to-memory data transfers without CPU intervention.
- Increments or decrements a source or destination address in 8-bit, 16-bit or 32-bit data transfers
- 4-data burst mode

UARTs
- 4 console UARTs and 1 high-speed UART (serial I/O) blocks with DMA-based or, interrupt-based operation
- Support for 5-bit, 6-bit, or 8-bit serial data transmit and receive
- Programmable baud rates
- 1 or 2 stop bits
- Odd or even parity
- Break generation and detection
- Parity overrun, and framing error detection
- X16 clock mode
- Infra-red(IR) Tx/Rx support(IrDA)
- Flow control with high-speed UART
- 32-byte Transmit FIFO and 32-byte Receive FIFO for high-speed UART

PCMCIA Socket Interface hardware

Timers
- 4 programmable 24-bit timers
- Interval mode or toggle mode operation
- Watchdog Timer
- 1 PWM output

Programmable I/O
- 43 programmable I/O ports
- Pins individually configurable to input, output, or I/O mode for dedicated signals
- All 5-V tolerant input pads

Interrupt Controller
- 25 interrupt sources, including 4 external interrupt sources
- Normal or fast interrupt mode (IRQ, FIQ)
- Prioritized interrupt handling

I2C serial Interface
- Master mode operation only
- Baud rate generation for serial clock generation

SPI(Serial Peripheral Interface)
- Four signal interface(SPIMOSI, SPIMISO, SPICLK, SPISEL)
- Full duplex operation, Synchronous Transfer
- Work with data characters from 2 to 32 bits long
- Master SPI mode only support
- Programmable clock generator
- Programmable clock phase and polarity(supports SPI Modes 0, 1, 2, 3)
- Programmable SPISEL Setup and Hold time
- Write collision flag protection
- Do not support multi-master environment

ADC
- One 12-bit resolution 4-channel high speed ADC
- Key matrix input
- Analog value measuring input
- Maximum conversion rate of 500KSPS with 2.5MHz clock

External DAC I/F
- Support for Internet Voice/Audio speaker application
- PCM buffer auto-control for Audio/Voice data
- I2S for Audio DAC I/F
- Voice DAC I/F

PLL
- The external clock can be multiplied by on-chip PLL to provide high frequency system clock
- The output frequency is programmable.

Operating Voltage Range
- 3.3V +/- 10%

Operating Frequency & Power
- Up to 55MHz
- 400mW @ 50MHz

Package
- 144pin TQFP
- 128pin LQFP (Optional)

Software
- All S/Ws are free
- BIOS
- Linux based RTOS
- Network Boot Over Ethernet Using DHCP and TFTP
- Full, Application-Accessible TCP/IP Network Stack
- Supports IPv4 and IPv6
- Implements UDP, TCP, DHCP, ICMP, and IGMP
- PCMCIA Driver
- PPP
- Various Drivers
- BSP